Co-Packaged Optics with External Laser Sources — The Thermal Leg Routed Around, The Fab Leg Appearing
mechanism
They solved the heat problem by moving the laser. The shortage just moved with it.
Who they are
A chip-to-chip light link that puts the heat-sensitive laser on the front panel instead of beside the processor[1].
What they do
It weakens the idea that heat is a hard ceiling — without removing the ceiling.
How it works
Products are shipping and 2026 coverage places the design in early data-centre use. But the same record shows demand for the laser material outrunning the factories that make it[1]. Copper still dies past about two metres at the top speed.
Why it matters
The engine's existing note says this bottleneck moves depending on where you look. It moved. Whether that is relief or a tighter chokepoint held by fewer owners is not settled here.
The engine's record — word for word
Architecture separating light generation from light modulation: the temperature-sensitive Indium-Phosphide laser is moved out of the hot ASIC package to a pluggable front-panel module, with silicon-photonic or thin-film-lithium-niobate modulators encoding data onto the delivered light. Shipping product exists (Lumentum ELS module for CPO platforms) and 2026 industry coverage places CPO with ELS in initial datacenter deployment[1]. WHAT THIS DOES TO interconnect_binding_constraint, held rather than stamped: that node's claim is explicitly that THE BINDING CONSTRAINT SHIFTS BY SCALE, and this is a shift, not an exit — the same 2026 record reports InP wafer-fabrication demand outrunning supply, relocating the constraint from thermal budget to fab capacity. Copper reach past ~2m at 224G is not disputed by this architecture. Two live legs: the thermal ceiling as a terminal physics boundary weakens; a supply-and-ownership chokepoint at the InP fab layer strengthens. Weighting between them is not collapsed here. Name no holder.
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